Novel Reversible CLA, Optimized RCA and Parallel Adder/Subtractor Circuits

Abstract

This paper proposes reversible circuit designs of the three most commonly used adders: carry look-ahead adder (CLA adder), ripple carry adder (RCA adder), and parallel adder/subtractor. The n-bit reversible CLA adder, called CLA-GH, is designed using the Peres and Fredkin gates. The n-bit optimized reversible RCA adder, called ORCA-GH, is designed using the reversible circuit of a parity-preserving reversible full adder. Both circuits reduce the quantum cost. However, the ORCA-GH circuit also improves the number of constant inputs. Furthermore, the n-bit reversible parallel adder/subtractor, called PAS-GH, is designed using the Feynman, Peres, and Fredkin gates. It decreases the number of garbage outputs and quantum cost. The transistor realizations of the CLA-GH and PAS-GH circuits are provided accordingly. The evaluation results indicate that the proposed circuits surpass the existing works in all figures of merit.