Hardware Modules of the RSA Algorithm

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Velibor Škobić
Branko Dokić
Željko Ivanović

Abstract

This paper describes basic principles of data protection using the RSA algorithm, as well as algorithms for its calculation. The RSA algorithm is implemented on FPGA integrated circuit EP4CE115F29C7, family Cyclone IV, Altera. Four modules of Montgomery algorithm are designed using VHDL. Synthesis and simulation are done using Quartus II software and ModelSim. The modules are analyzed for different key lengths (16 to 1024) in terms of the number of logic elements, the maximum frequency and speed.

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